kernel won't boot on a Cyrix MediaGXm (Geode )

Samuel,

On Montag, 21. Juli 2008, Samuel Sieb wrote:
> I have a computer here with a CPU that the BIOS identifies as:
> Cyrix MediaGXm/Cx5530 Unicorn Revision 1.19.3B
>
> kernel 2.6.14 identifies it as:
> vendor_id : Geode by NSC
> cpu family : 5
> model : 9
> model name : Geode(TM) Integrated Processor by National Semi
> stepping : 1
>
> I can't boot any kernel later than 2.6.22 on it. Anything later either
> hangs or gives random kernel panics while booting. I tracked down the
> problem to a specific commit:
>
> commit f25f64ed5bd3c2932493681bdfdb483ea707da0a
> Author: Juergen Beisert <[email protected]>
> Date: Sun Jul 22 11:12:38 2007 +0200
>
> x86: Replace NSC/Cyrix specific chipset access macros by inlined
> functions.
>
> Reversing the patch (compensating for kernel changes) let me boot a
> 2.6.25 kernel. I realize the patch is supposed to fix something that
> didn't work right, but I didn't have a problem before and I do now. :-)

Yes. My patch makes some chipset tweaks working as expected. Or at least it
makes them work. It seems nobody ever tested them before. Remove the
following line (or change it to meet your CPU clock frequency):

linux-2.6.25/arch/x86/kernel/cyrix.c, line 151. Disable this line or change
the value 0x04 according to the speed of your CPU. This tweak helps others
with random hangs of their system.

For this CX86_PCR0 register here some info from the datasheet:

/*
* Setup the chipset specific Performance Control Incrementer
*
* The Performance Control Incrementer seems to be a delay line to control
* data setup time for DRAM access or it controls its jitter. Its setting
* depends on CPU and DRAM clock (CPU and DRAM clock are coupled through a
* simple clock divider. For a 300 MHz CPU the divider is 3.0 to get a DRAM
* clock of 100MHz)
* There is an application note how to setup it:
* "AMD Geode GX1 Processor Memory Timings for Maximum Performance."
* Values for various CPUs:
* 1-0 for processor speed 200...266MHz
* 1-1 for processor speed 300 and 333MHz
*
* Note: If your system runs unstable after setting new values here,
* try with other values or leave the value as the BIOS setup it.
* The setting depends also on physical layout!
*/

Regards
Juergen

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Samuel Sieb wrote:
> I have a computer here with a CPU that the BIOS identifies as:
> Cyrix MediaGXm/Cx5530 Unicorn Revision 1.19.3B
>
> kernel 2.6.14 identifies it as:
> vendor_id : Geode by NSC
> cpu family : 5
> model : 9
> model name : Geode(TM) Integrated Processor by National Semi
> stepping : 1
>
> I can't boot any kernel later than 2.6.22 on it. Anything later either
> hangs or gives random kernel panics while booting. I tracked down the
> problem to a specific commit:
>
> commit f25f64ed5bd3c2932493681bdfdb483ea707da0a
> Author: Juergen Beisert <[email protected]>
> Date: Sun Jul 22 11:12:38 2007 +0200
>
> x86: Replace NSC/Cyrix specific chipset access macros by inlined
> functions.
>
> Reversing the patch (compensating for kernel changes) let me boot a
> 2.6.25 kernel. I realize the patch is supposed to fix something that
> didn't work right, but I didn't have a problem before and I do now. :-)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [email protected]
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> Please read the FAQ at http://www.tux.org/lkml/

I couldn't figure out what the problem was, but shouldn't ccr3 be
declared as u8 in the following file? After all, that's what setCx86
expects. I realise that it being u32 will do no harm here, but I thought
I should point it out.

diff --git a/arch/x86/kernel/cpu/mtrr/cyrix.c
b/arch/x86/kernel/cpu/mtrr/cyrix.c
index ff14c32..e7d9f7e 100644
--- a/arch/x86/kernel/cpu/mtrr/cyrix.c
+++ b/arch/x86/kernel/cpu/mtrr/cyrix.c
@@ -123,7 +123,7 @@ cyrix_get_free_region(unsigned long base, unsigned
long size, int replace_reg)
}

static u32 cr4 = 0;
-static u32 ccr3;
+static u8 ccr3;

static void prepare_set(void)
{
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* Rafael C. de Almeida <[email protected]> wrote:

> Samuel Sieb wrote:
> > I have a computer here with a CPU that the BIOS identifies as:
> > Cyrix MediaGXm/Cx5530 Unicorn Revision 1.19.3B
> >
> > kernel 2.6.14 identifies it as:
> > vendor_id : Geode by NSC
> > cpu family : 5
> > model : 9
> > model name : Geode(TM) Integrated Processor by National Semi
> > stepping : 1
> >
> > I can't boot any kernel later than 2.6.22 on it. Anything later either
> > hangs or gives random kernel panics while booting. I tracked down the
> > problem to a specific commit:
> >
> > commit f25f64ed5bd3c2932493681bdfdb483ea707da0a
> > Author: Juergen Beisert <[email protected]>
> > Date: Sun Jul 22 11:12:38 2007 +0200
> >
> > x86: Replace NSC/Cyrix specific chipset access macros by inlined
> > functions.
> >
> > Reversing the patch (compensating for kernel changes) let me boot a
> > 2.6.25 kernel. I realize the patch is supposed to fix something that
> > didn't work right, but I didn't have a problem before and I do now. :-)

does the debug patch below (ontop of v2.6.26 or later kernels) make the
system bootable again? Commit f25f64ed5 changed the meaning of that
line. This patch switches back to the old behavior (which essentially
did nothing, due to macro side-effect bugs).

(if this makes a difference we can figure out a proper way for a DMI or
CPU ID based quirk or something like that.)

Ingo

------------------>
commit d92d27891c37c58830e58e3277f1918465ceaee9
Author: Ingo Molnar <[email protected]>
Date: Mon Jul 21 13:45:19 2008 +0200

debug patch

Signed-off-by: Ingo Molnar <[email protected]>
---
arch/x86/kernel/cpu/cyrix.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index 3fd7a67..85700c3 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -162,7 +162,7 @@ static void __cpuinit geode_configure(void)
local_irq_save(flags);

/* Suspend on halt power saving and enable #SUSP pin */
- setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
+ /* setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); */

ccr3 = getCx86(CX86_CCR3);
setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */

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